By Dr. Marian Verhelst, Prof. Wim Dehaene (auth.)
Smart strength administration, either at layout time and at run time, is quintessential in glossy radios. It calls for a cautious trade-off among the system’s functionality, and its energy intake. additionally, the layout needs to be dynamically reconfigurable to optimally stability those parameters at run time, reckoning on the present working conditions.
Energy Scalable Radio Design starts off by way of describing an energy-driven layout method, tackling those implementation demanding situations for instant communique platforms. the method minimizes power intake and optimizes reconfigurability in any respect consecutive layout steps, from process point right down to circuit point. moreover, a unique implementation proposal of "nested FLEXmodules" is brought at electronic RT-level, allowing hugely scalable implementations, with minimum power overhead.
Energy Scalable Radio Design keeps by means of making use of this layout technique to the layout of an energy-efficient, hugely scalable, pulsed UWB receiver, appropriate for low info expense communique and sub-cm ranging. This booklet meticulously covers the various layout steps and the followed optimizations: method point air interface choice, architectural/algorithmic layout area exploration, algorithmic refinement (acquisition, synchronization and varying algorithms) and circuit point (RTL) implementation in line with the FLEXmodule-concept. size effects display the effectiveness and necessity of the energy-driven layout approach.
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Extra resources for Energy Scalable Radio Design: for Pulsed UWB Communication and Ranging
The extreme sensitivity of superregenerative radios to temperature and supply voltage changes can and should be corrected for by an autocalibration during the packet synchronization, as proposed in [Che07]. A. for ultrawideband (UWB) communication [FCC02]. This radiotechnology spreads the data over a large bandwidth (>500 MHz) [Hoc02]. While most of the attention in this field went to the deployment of shortrange, ultrahigh data rate UWB communication (more than 100 Mbps) [IEEa], there also seemed to be interesting opportunities for ultralow-power pulse-based signaling [IEEd].
This battery contains about 1,250mAh [Ene], from which half of it can be assigned to the transceiver. As a result, the maximum receive energy-per-bit should be limited to 10 nJ bit−1. The transmit energy is reduced to 1/10th of this value, to meet the asymmetric link requirements. This transmit power of 1 nJ bit−1 allows the transmitter to be fed from an on-chip capacitor. An integrated capacitor of 100 nF could supply the energy to transmit small data packets of 50 bits. 1 summarizes all derived system level specifications.
If based on this information no design decision can be made yet, decision postponement allows to take multiple alternatives to the next abstraction layer. Furthermore, an early DSE is needed, in which a joint optimization of the system’s algorithms and architecture is done. Next to these crosslayer design methods, a strategy to include run time flexibility at design time is proposed. Finally, the chapter ends by sketching the importance of determining the specifications of the analog front-end building blocks at architectural level, considering their impact on the complete system.